hwd32
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新增6页：p18(寄存器+Table)/p20-p21(PSR双图+APSR位域)/p197(MPU汇编)/p237-238(CFSR/UFSR位域描述) 原有6页：p1封面/p2目录/p12-p13正文/p51-p52指令表 Co-Authored-By: Claude <noreply@anthropic.com>
59 lines
877 B
Plaintext
59 lines
877 B
Plaintext
The Cortex-M4 processor
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PM0214
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18/262
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PM0214 Rev 10
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2.1.3
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Core registers
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Figure 2. Processor core registers
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Table 2. Summary of processor mode, execution privilege level, and stack usage
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Processor
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mode
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Used to
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execute
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Privilege level for
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software execution
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Stack used
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Thread
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Applications
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Privileged or unprivileged (1)
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1.
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See CONTROL register on page 25.
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Main stack or process stack (1)
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Handler
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Exception handlers
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Always privileged
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Main stack
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Table 3. Core register set summary
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Name
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Type (1)
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Required
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privilege (2)
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Reset
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value
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Description
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R0-R12
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read-write
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Either
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Unknown
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General-purpose registers on page 19
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MSP
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read-write
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Privileged
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See description Stack pointer on page 19
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PSP
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read-write
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Either
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Unknown
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Stack pointer on page 19
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LR
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read-write
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Either
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0xFFFFFFFF
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Link register on page 19
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PC
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read-write
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Either
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See description Program counter on page 19
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