2.3 KiB
2.3 KiB
来源:PM0214 Rev 10,Page 13
1.3 About the STM32 Cortex-M4 processor and core peripherals
The Cortex-M4 processor is a high performance 32-bit processor designed for the microcontroller market. It offers significant benefits to developers, including:
- Outstanding processing performance combined with fast interrupt handling
- Enhanced system debug with extensive breakpoint and trace capabilities
- Efficient processor core, system and memories
- Ultra-low power consumption with integrated sleep modes
- Platform security robustness, with integrated memory protection unit (MPU)
The Cortex-M4 processor is built on a high-performance processor core, with a 3-stage pipeline Harvard architecture, making it ideal for demanding embedded applications. The processor delivers exceptional power efficiency through an efficient instruction set and extensively optimized design, providing high-end processing hardware including:
- IEEE754-compliant single-precision floating-point computation
- A range of single-cycle and SIMD multiplication and multiply-with-accumulate capabilities
- Saturating arithmetic
- Dedicated hardware division
Figure 1. STM32 Cortex-M4 implementation
架构框图展示了 Cortex-M4 处理器的内部结构,包含以下主要组件:
| 组件 | 说明 |
|---|---|
| Cortex-M4 processor | 处理器核心 |
| FPU | 浮点运算单元 |
| NVIC | 嵌套向量中断控制器 |
| Memory protection unit | 内存保护单元 |
| Debug access port | 调试访问端口 |
| Embedded Trace Macrocell | 嵌入式跟踪宏单元 |
| Serial wire viewer | 串行线查看器 |
| Bus matrix | 总线矩阵 |
| Flash patch | Flash补丁 |
| Data watchpoints | 数据监视点 |
| Code interface | 代码接口 |
| SRAM and peripheral interface | SRAM和外设接口 |
寄存器位访问类型
| 缩写 | 含义 |
|---|---|
| read/clear (rc_w1) | Software can read as well as clear this bit by writing 1. Writing '0' has no effect on the bit value. |
| read/clear (rc_w0) | Software can read as well as clear this bit by writing 0. Writing '1' has no effect on the bit value. |
| toggle (t) | Software can only toggle this bit by writing '1'. Writing '0' has no effect. |
| Reserved (Res.) | Reserved bit, must be kept at reset value. |
原始图片:imgs/page_13.png(无图则注明无图)